IMPEDANCE-TO-DIGITAL CONVERTER, IMPEDANCE-TO-DIGITAL CONVERTING DEVICE, AND METHOD FOR ADJUSTMENT OF IMPEDANCE-TO-DIGITAL CONVERTING DEVICE

專利類型

發明

專利國別 (專利申請國家)

美國

專利申請案號

15/259,187

專利證號

US 9,716,498 B2

專利獲證名稱

IMPEDANCE-TO-DIGITAL CONVERTER, IMPEDANCE-TO-DIGITAL CONVERTING DEVICE, AND METHOD FOR ADJUSTMENT OF IMPEDANCE-TO-DIGITAL CONVERTING DEVICE

專利所屬機關 (申請機關)

國立交通大學

獲證日期

2017/07/25

技術說明

一種阻抗至數位轉換器包含一偵測單元、一偏移阻抗單元、一參考阻抗單元、一積分單元及一電壓轉數碼單元。偵測單元將輸入信號轉換成一第一電荷。偏移阻抗單元將偏移信號轉換成一第二電荷。參考阻抗單元將參考信號轉換成一參考電荷， 該參考電荷的正負相關於數位信號的邏輯準位。積分單元接收該第一電荷、該第二電荷及該參考電荷， 並於每一週期時間據以加總轉換成一積分電壓。電壓轉數碼單元判斷積分電壓的大小以產生一數位信號。多個週期的數位信號的序列平均值正比於待偵測阻抗的阻抗值。阻抗值的偵測範圍的中心值是正比於類比信號的比例。阻抗值的靈敏度是正比於類比信號的比例。 The purpose of this invention is to provide a new architecture for impedance to digital converter. The converter includes sensor network, offset network and reference network, analog signal generator, integrator and modulator. The impedance detecting range can be optimized by configuration of offset impedance, reference impedance and analog signals. The best impedance detecting resolution can also be provided after detecting range is determined. Compared with present technique and research literature, wide impedance detecting range and best impedance detecting resolution with proposed converter can be simultaneously obtained under restricted chip area.

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