三維電壓式TSV訊號傳輸架構Scheme for 3D Voltage Type TSV Signal Transmission

專利類型

發明

專利國別 (專利申請國家)

美國

專利申請案號

14/146,017

專利證號

US 9,312,856 B2

專利獲證名稱

三維電壓式TSV訊號傳輸架構Scheme for 3D Voltage Type TSV Signal Transmission

專利所屬機關 (申請機關)

國立清華大學

獲證日期

2016/04/12

技術說明

三維電壓式TSV訊號傳輸架構 The present invention is generally relevant to a 3D stacked chip device, specifically, a 3D voltage type TSV signal transmission scheme. [0007] One feature of the invention is proposed a method for 3D voltage type TSV signal transmission, the method including a step of transmitting a full swing signal of data with a first voltage through TSVs for each one of a plurality of slave devices to determine a transmission time required for data transmission to a master device. Then, full swing signal is sensed by the master device for reduce the first voltage to be a second voltage lower than the first voltage. Logic "0" signals or logic "1" signals with the second voltage are transmitted through the TSVs by the plurality of slave devices. It is sharing charge and balancing voltage level to a mean value for the logic "1" signals or the logic "0" signals by the master device. The present invention is generally relevant to a 3D stacked chip device, specifically, a 3D voltage type TSV signal transmission scheme.

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