MULTI-BIT CURRENT SENSE AMPLIFIER WITH PIPELINE CURRENT SAMPLING OF RESISTIVE MEMORY ARRAY STRUCTURE AND SENSING METHOD THEREOF

專利類型

發明

專利國別 (專利申請國家)

美國

專利申請案號

16/904,577

專利證號

US 11,049,550

專利獲證名稱

MULTI-BIT CURRENT SENSE AMPLIFIER WITH PIPELINE CURRENT SAMPLING OF RESISTIVE MEMORY ARRAY STRUCTURE AND SENSING METHOD THEREOF

專利所屬機關 (申請機關)

國立清華大學

獲證日期

2021/06/29

技術說明

A multi-bit current sense amplifier with pipeline current sampling of a resistive memory is configured to sense a plurality of bit line currents of a plurality of bit lines in a pipeline operation. A core sense circuit is connected to one part of the bit lines and generates a reference parallel resistance current and a reference anti-parallel resistance current. A plurality of bit line precharge branch circuits are connected to the core sense circuit and another part of the bit lines. The bit line currents of the bit lines, the reference parallel resistance current and the reference anti-parallel resistance current are sensed by the core sense circuit and the bit line precharge branch circuits in the pipeline operation so as to sequentially generate a plurality of voltage levels on the core sense circuit in a clock cycle.

備註

連絡單位 (專責單位/部門名稱)

智財技轉組

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03-5715131-62219

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