SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

專利類型

發明

專利國別 (專利申請國家)

美國

專利申請案號

16/809,529

專利證號

US 11,670,699 B2

專利獲證名稱

SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME

專利所屬機關 (申請機關)

國立交通大學

獲證日期

2023/06/06

技術說明

當III-V族半導體化合物為氮化鎵或氧化鎵時，通道將呈現常開型的狀態，由於常開模式之電晶體其臨界電壓為負值，即電晶體在零閘極偏壓時，電晶體仍會導通電流並形成額外之功率損耗。目前，解決此問題之方法，例如減薄氮化鎵層、離子佈植、或利用p型氧化鎵調整能帶結構使其臨界電壓大於0 V，但由於電晶體在應用時，閘極電壓會隨著汲極偏壓有一不穩定之擾動造成誤啟動之現象，故其電晶體之臨界電壓需大於6 V以上才能有效避免誤啟動現象發生，故需要進行改良。目前學術及業界所使用避免誤啟動的方式大多屬於增加額外電路進行改良，但此方法會形成寄生效應造成不必要之能量耗損，此外也會增加製造成本。本專利闡述之技術不但能夠使臨界電壓大於5.2 V且具有良好的元件特性。 Gallium Nitride (GaN) HEMT is a normally-on device. Due to the normally-on characteristic, transistor leads to a additional power consumption. However, due to the fail-safe and fault turn-on issues of the power switching devices, the normally-off GaN HEMTs with high Vth are needed for power switching device applications. Several techniques such as fluorine ions implantation, p-GaN, and gate recess have been adopted to fabricate the normally-off GaN HEMTs. However, these techniques result in the degradation of the device performance and the Vth of the E-mode GaN HEMTs are not high enough. To avoid the fault turn-on, the threshold voltage needs to be higher than 6 V. In this work, we demonstrate a E-mode GaN MIS-HEMT with high threshold voltage of 5.2 V with well device performance.

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