SOFT-VERIFY WRITE ASSIST CIRCUIT OF RESISTIVE MEMORY AND OPERATING METHOD THEREOF

專利類型

發明

專利國別 (專利申請國家)

美國

專利申請案號

16/168,815

專利證號

US 10,510,406 B1

專利獲證名稱

SOFT-VERIFY WRITE ASSIST CIRCUIT OF RESISTIVE MEMORY AND OPERATING METHOD THEREOF

專利所屬機關 (申請機關)

國立清華大學

獲證日期

2019/12/17

技術說明

應用於非揮發性運算系統之使用電阻式記憶體之非揮發性邏輯電路開發與探索 According to one aspect of the present disclosure, a soft-verify write assist circuit of a resistive memory is controlled by a reference voltage, a word line and a switching signal. The soft-verify write assist circuit of the resistive memory includes a memory cell, a first three-terminal switching element, a second three-terminal switching element and a soft-verify controlling unit. The memory cell is controlled by the word line and includes a bit line and a source line. The first three-terminal switching element is electrically connected between the memory cell and a ground voltage. The first three-terminal switching element is controlled by the switching signal. The second three-terminal switching element is electrically connected to the memory cell. The second three-terminal switching element is controlled by the switching signal. The soft-verify controlling unit is electrically connected to the second three-terminal switching element. The soft-verify controlling unit includes a write data line, a comparator and a soft-verify write voltage controlling module. The write data line is signally connected to the second three-terminal switching element. The comparator is signally connected to the write data line and the reference voltage. The comparator is configured to compare a voltage level of the write data line with the reference voltage to generate a write voltage controlling signal. The soft-verify write voltage controlling module is signally connected to the comparator. The soft-verify write voltage controlling module generates a write voltage according to the write voltage controlling signal. The write voltage is applied on the write data line. The write voltage is increased in a ramping cycle and decreased in a soft-verify cycle, and the soft-verify cycle is next to the ramping cycle. The first three-terminal switching element is switched by the switching signal to enable the ground voltage to be coupled to the source line or the bit line, and the second three-terminal switching element is switched by the switching signal to enable the write data line to be coupled to the bit line or the source line. According to another aspect of the present disclosure, an operating method of the soft-verify write assist circuit of the resistive memory provides a voltage level applying step, a write operating step and a write voltage controlling step. The voltage level applying step is for applying a plurality of voltage levels to the reference voltage, the word line and the switching signal, respectively. The write operating step is for driving the memory cell to perform in a set process or a reset process via the first three-terminal switching element, the second three-terminal switching element and the soft-verify controlling unit during a write operation. The write voltage controlling step is for controlling the write voltage to be increased in the ramping cycle and decreased in the soft-verify cycle

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