差量調變裝置AREA-EFFICIENCY DELTA MODULATOR FOR QUANTIZING AN ANALOG SIGNAL

專利類型

發明

專利國別 (專利申請國家)

美國

專利申請案號

13/788,518

專利證號

US 8,842,029 B2

專利獲證名稱

差量調變裝置AREA-EFFICIENCY DELTA MODULATOR FOR QUANTIZING AN ANALOG SIGNAL

專利所屬機關 (申請機關)

國立交通大學

獲證日期

2014/09/23

技術說明

本發明結合了取樣保持電路與數位類比轉換電路以構成減法運算單元。在類比轉數位單元裡，在不改變抑或改變量化誤差的條件下，根據差值訊號的大小來動態調整所解的位元數或者量化步階大小，進而節省不必要的功率消耗以達到低耗能電路的設計。減法運算單元與類比轉數位單元在不同操作時間點下共用相同的二進位加權電容陣列在時間上做切換，降低電路複雜度與不必要的面積浪費。本發明無需消耗任何靜態功率便能完成差值取樣與類比數位轉換功能。 The invention comprises sample and hold circuit and digital-to-analog converter into a differentially operational unit. In analog-to-digital conversion unit, on the premise of fixed or non-fixed quantization error, analog-to-digital converter dynamically adjusts number of bits solved or size of quantized step according to the magnitude of differential voltage between sampled input signal and previously quantized input signal, thus this invention can reduce the non-necessary power consumption from redundant code and overload of input signal. Differentially operational unit and analog-to-digital unit share the same capacitor array which has binary-weighted arrangement to reduce circuit complexity and area. The invention doesn't need to consume any static power to accomplish the function of differential sample and analog-to-digital conversion.

備註

本部(收文號1100065219)同意該校110年10月27日陽明交大研產學字第1100036963號函申請終止維護專利(陽明交大)

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