發明
中華民國
100116580
I 456755
變晶性積體化雙極場效電晶體
國立高雄師範大學
2014/10/11
本發明揭示一種變晶性積體化雙極場效電晶體。該變晶性積體化雙極場效電晶體係在低成本砷化鎵基板上製作磷化銦/砷化銦鎵(InP/InGaAs)雙極性電晶體與場效電晶體。其中,該雙極性電晶體係於建構於磷化銦鎵(In0.52Ga0.48P)至磷化銦(InP)變晶性緩衝層之上,具有高的電流增益且低的集-射極補償電壓,可減少電路應用之功率消耗。該場效電晶體係於建構於該雙極性電晶體之上,具有高輸出電流、轉導值與線性度。本發明之變晶性積體化雙極場效電晶體,同時具有雙極性電晶體與場效電晶體之優越特性,且結構簡單,成本低,整體積體化元件僅較變晶性雙極性電晶體多出四層材料層而已,極適於數位、類比、混模信號及積體電路之使用。 The metamorphic integrated BiFETs are fabricated on low-cost GaAs substrates. The bipolar transistor of the integrated BiFETs is fabricated on the undoped metamorphic buffer layer which graded from In0.52Ga0.48P to InP, and the device with high current gain and low collector-emitter offset voltage for reducing power consumption is achieved. Furthermore, the field-effect transistor is fabricated on the bipolar transistor, and the device characteristics with high drain current, transconductance, and linearity are obtained. The substantial advantages of the metamorphic integrated BiFETs, such as excellent characteristics of bipolar and field-effect transistors, simple structure, and low cost, are included in this invention. The over layers of the integrated devices are only more than four material layers, as compared with the metamorphic bipolar transistor. Consequently, the integrated BiFETs are very promising for digital, analog, mixed-mode, and integrated circuit applications.
本部(發文號1090000319)同意貴校108年12月30日高師大研字第1081011487號函申請終止維護專利。
學術研究組
7172930轉6700
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