標準阻抗基板的製造方法

專利類型

發明

專利國別 (專利申請國家)

中華民國

專利申請案號

101128773

專利證號

I 470256

專利獲證名稱

標準阻抗基板的製造方法

專利所屬機關 (申請機關)

國立高雄大學

獲證日期

2015/01/21

技術說明

本專利申請案提出一可相容於傳統多層印刷電路板製程之新式電路板雙面開窗製程技術，該技術可運用於新式雙面校正治具之實現及以金屬為核心(Metal Core)之多層印刷電路板實現。主要運用為以印刷電路板核心金屬層為主要校正治具設計層，其餘上下金屬層搭配抗雜訊電路及阻抗匹配設計觀念，實踐一以硬質結構多層印刷電路板結構實現之非換層結構雙面多埠互連之穿透/線校正治具，發展寬頻、多埠、非共面，且適合三維高密度系統電路射頻量測校正所需之標準阻抗標準基板(Impedance Standard Substrate, ISS)。 The purpose of this patent is designed a novel double-side slot technology compatible application with the traditional multi-layer printed circuit board process. The technology can be applied to the implementation of the novel double-side calibration kit that used the metal core by multi-layer printed circuit board. The main use for the core metal layer of the printed circuit board is a calibration kit design layer, and the upper and lower metal layer are designed for concepts of noise suppresser circuit and impedance matching. To realize a rigid structure of multi-layer printed circuit board to achieve a multi-port double-side thru/line with non-exchange layer structure. By using the novel double-side impedance standard substrate to develop RF measurement correction which is suitable for three-dimensional high-density system circuit and with high-speed, multi-port, non-coplanar characteristics.

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研究發展處

連絡電話

07-5919100

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