具有低雜訊及高輸出電壓電流之電子幫浦Charge Pump with Low Noise and High Output Current and Voltage

專利類型

發明

專利國別 (專利申請國家)

美國

專利申請案號

12/906,313

專利證號

US 8,274,322 B2

專利獲證名稱

具有低雜訊及高輸出電壓電流之電子幫浦Charge Pump with Low Noise and High Output Current and Voltage

專利所屬機關 (申請機關)

國立清華大學

獲證日期

2012/09/25

技術說明

本發明係揭露一種具有低雜訊及高輸出電壓電流之電子幫浦系統，包含：一四相時脈產生器，用以產生一第一訊號群組，其包含分別具有不同相位之一第一訊號、一第二訊號、一第三訊號及一第四訊號；複數延遲電路，串聯並耦合至上述四相時脈產生器，其中每一上述延遲電路係耦合至相對於每一上述延遲電路之前一延遲電路，用以延遲由上述前一延遲電路接收之一訊號群組；一第一電子幫浦電路，耦合至上述四相時脈產生器及上述複數延遲電路；及一輸出終端，耦合至上述第一電子幫浦電路；其中，上述第一訊號位於高位準之時間與上述第三訊號位於高位準之時間之兩區段重疊，以產生一第一重疊時間及一第二重疊時間，且上述第一重疊時間不等於上述第二重疊時間。 The present invention discloses a charge pump system with low noise and high output current and voltage, comprising: a four phase clock generator used to generate a first signals group; a serial of delay circuits coupled to said four phase clock generator, wherein each of said delay circuits is coupled to a previous delay circuit relative to each of said delay circuits for delaying a signals group received from said previous delay circuit; a first charge pump circuit coupled to the four phase clock generator and the delay circuits; and an output terminal coupled to the first charge pump circuit; wherein high level of said first signal overlaps two sections of high level of said third signal to generate a first overlapping time and a second overlapping time, and said first overlapping time is not equal to said second overlapping time.

備註

連絡單位 (專責單位/部門名稱)

智財技轉組

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03-5715131-62219

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