發明
中華民國
103140499
I 560782
薄膜電晶體製作方法
國立中山大學
2016/12/01
本發明揭示一種薄膜電晶體製作方法,用於解決低溫製程導致電晶體薄膜缺陷過多的問題,該薄膜電晶體製作方法的步驟包含於一基板上形成一電晶體雛型,該電晶體雛型之表面具有至少一待處理部;及將該電晶體雛型的待處理部裸露於充滿超臨界流體的環境中,使超臨界流體對該電晶體雛型的待處理部進行表面處理,用以製成一薄膜電晶體。藉此,超臨界流體可鈍化缺陷,可確實減少薄膜之中缺陷數量,進而提升開啟電流(on-current)、改善次臨界擺幅(sub-threshold slope)。 This invention discloses a thin film transistor fabrication method to solve the problem of too much defect of transistors manufactured by low temperature. The method comprises steps of forming a transistor prototype on a substrate, a surface of the transistor prototype having at least one to-be-treated portion; and exposing the to-be-treated portion of the transistor prototype in an environment full of the supercritical fluid, to implement a surface treatment process of the to-be-treated portion of the transistor prototype by the supercritical fluid for the purpose of a thin film transistor fabrication. Thus, it can actually resolve the said problem.
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