閘極堆疊結構及包含其之金屬氧化物半導體元件及閘極堆疊結構之製造方法

專利類型

發明

專利國別 (專利申請國家)

中華民國

專利申請案號

101145311

專利證號

I 505468

專利獲證名稱

閘極堆疊結構及包含其之金屬氧化物半導體元件及閘極堆疊結構之製造方法

專利所屬機關 (申請機關)

國立交通大學

獲證日期

2015/10/21

技術說明

近年來三五族複合物半導體已被廣泛的研究；而將High-κ氧化物沉積於三五族複合物半導體晶片上作為閘極介電層之三五金氧半導體電晶體(III-V Metal-Oxide-Ssemiconductor Field Effect transistor)，也已被開發用以取代傳統矽材之金氧半導體電晶體(Si MOSFET)；但隨著科技的發展，積體電路尺寸日益變小，單位電容量的需求也日益增加；因此，此專利利用一層氧化鉿接著一層氧化鑭堆疊沉積在三五族半導體上，而此複合氧化層經退火後會形成新的氧化鑭與氧化鉿之混合氧化層，此混合氧化層除具有高介電係數外，亦有較佳之半導體與氧化層介面，使得元件具有較低之Dit。 III-V compound semiconductor was widely studied in recent years. High k materials were deposited on compound semiconductor as gate dielectric for III-V MOSFET to replace Si-based MOSFET. However, the size of integrated circuits was become smaller and the high capacitance was required withhigh technology development. Therefore, HfO2 and La2O3layers were deposited layer by layer on III-V semiconductor, and then a new compound was formed after annealing, which will result in the device with high capacitance and lowDit due to excellent surface between oxide and semiconductor.

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