線性-對數型主動式像素感測器

專利類型

發明

專利國別 (專利申請國家)

中華民國

專利申請案號

107136980

專利證號

I 692979

專利獲證名稱

線性-對數型主動式像素感測器

專利所屬機關 (申請機關)

國立中山大學

獲證日期

2020/05/01

技術說明

一種線性-對數型主動式像素感測器包含一重置電晶體、一開關電晶體、一光電二極體、一第一輸出電晶體及一對數電晶體，該重置電晶體電性連接一電源端及一積分節點，該開關電晶體電性連接積分節點，且該開關電晶體受該積分節點之電位控制，該光電二極體電性連接該積分節點及一接地端，該第一輸出電晶體電性連接該積分節點、該電源端及一輸出節點，且該第一輸出電晶體受該積分節點之電位控制，該對數電晶體電性連接該電源端，且該對數電晶體經由該開關電晶體耦接該積分節點，其中，該對數電晶體為一PMOS電晶體，且該對數電晶體受該輸出節點之電位控制。A linear-logarithmic active pixel sensor includes a reset transistor, a switch transistor, a photodiode, a first output transistor and a logarithmic transistor. The reset transistor is electrically connected to a power source end and an integral node. The switch transistor is electrically connected to the integral node, and the switch transistor is controlled by the potential of the integral node. The photodiode is electrically connected to the integral node and a ground end. The first output transistor is electrically connected to the integral node, the power source end and an output end, and the first output transistor is controlled to the potential of the integral node. The logarithmic transistor is electrically connected to the power source end, and the logarithmic transistor coupled to the integral node via the switch transistor. Wherein, the logarithmic transistor is a PMOS transistor, and the logarithmic transistor is controlled by the potential of the output node.

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