奈米雙晶鎳金屬層、其製備方法、及包含其之電性連接結構、基板及封裝結構Nano-twinned Ni layer, method for manufacturing the same, and electrical connecting structure, substrate and package structure containing the same

專利類型

發明

專利國別 (專利申請國家)

中華民國

專利申請案號

103115878

專利證號

I 521104

專利獲證名稱

奈米雙晶鎳金屬層、其製備方法、及包含其之電性連接結構、基板及封裝結構Nano-twinned Ni layer, method for manufacturing the same, and electrical connecting structure, substrate and package structure containing the same

專利所屬機關 (申請機關)

國立交通大學

獲證日期

2016/02/11

技術說明

本發明係關於一種電鍍沉積之奈米雙晶鎳金屬層；其中，奈米雙晶鎳金屬層之50%以上的體積包括複數個鎳晶粒，鎳晶粒彼此間係互相連接，每一鎳晶粒係由複數個奈米雙晶鎳沿著[111]晶軸方向堆疊而成，相鄰之鎳晶粒間之堆疊方向之夾角係0至20度，且奈米雙晶鎳金屬層之至少60%的表面係(111)面。此外，本發明更提供前述奈米雙晶鎳金屬層之製備方法及包含其之電性連接結構、基板及封裝結構。本發明是使用脈衝電鍍的方法，製造高密度且晶粒規則排列(具有highly preferred orientation)的奈米雙晶金屬鎳膜。此技術的特色在於能夠產生柱狀(111)晶粒，並且奈米雙晶皆平行基材表面，鍍層的表面(即與其他元件或導體相連接的接合面)具備高密度且平行於(111)平面的雙晶。 An electrodeposited nano-twinned Ni layer is disclosed, wherein at least 50% in volume of the electrodeposited nano-twins Ni layer comprises plural Ni grains adjacent to each other, wherein the said Ni grains are made of Ni twins staked along a [111] crystal axis, the angle of the stacking directions of the nano-twins between one grain and the neighboring grain is between 0 to 20 degrees, and at least 60% of a surface area of the nano-twinned Ni layer is a (111) plane. In addition, the present invention further provides a method for manufacturing the aforementioned nano-twinned Ni layer, and electrical connecting structure, a substrate and a package structure containing the same. This invention is to use pulsed electrodepostion to fabricate nanotwinned Ni grains with highly (111) preferred orientation.

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