快取記憶體/Cache Memory

專利類型

發明

專利國別 (專利申請國家)

美國

專利申請案號

14/716,242

專利證號

US 9,632,951 B2

專利獲證名稱

快取記憶體/Cache Memory

專利所屬機關 (申請機關)

國立中山大學

獲證日期

2017/04/25

技術說明

本發明揭示一種快取記憶體，用於解決標籤記憶體閒置之問題，包含：一標籤儲體陣列；一資料儲體陣列；一控制暫存器，記錄至少一快取通路之重組態狀態、該標籤儲體陣列儲存資料的起始位置及該資料儲體陣列儲存資料的起始位置；一儲體控制器，電性連接該標籤儲體陣列、該資料儲體陣列及該控制暫存器，依據一模式位元組、一標籤基底位址及一資料基底位址控制該標籤儲體陣列及資料儲體陣列的資料存取狀態；及一選擇模組，電性連接於該標籤儲體陣列、該資料儲體陣列及該儲體控制器之間。藉此，可確實解決上述問題。 This invention discloses a cache memory which is used to solve the problem of idleness of tag memory in the conventional cache. The cache memory comprises a tag memory array, a data memory array, a control register, a memory controller, and a selection module. The control register records a reconfigurable status of at least one cache way, a start address of the tag memory array, and a start address of the data memory array. The memory controller is electrically connected to the tag memory array, the data memory array and the control register, and controls the data access status of the tag memory array and the data memory array based on a set of mode bits, a tag base address and a data base address. The selection module is electrically connected among the tag memory array, the data memory array, and the memory controller. Thus, it can actually resolve the said problem.

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