發明
中華民國
107139267
I 689925
單端讀寫無擾動式靜態隨機存取記憶體
國立中山大學
2020/04/01
一種靜態隨機存取記憶體包含複數個SRAM單元及一電性連接該些SRAM單元之資料讀寫單元,各該SRAM單元具有一電晶體對、一寫入電晶體、一傳輸電晶體、一防擾動電晶體及一漏電流電晶體,該電晶體對電性連接一儲存節點及一反儲存節點,該寫入電晶體電性連接該儲存節點,該傳輸電晶體電性連接該反儲存節點,該防擾動電晶體電性連接該寫入電晶體及該傳輸記憶體,該漏電流電晶體電性連接該儲存節點及一接地端,其中該漏電流電晶體受該反儲存節點之一電位控制,以選擇性地導通或截止該儲存節點及該接地端之間的電性連接,而可在導通時提供一放電路徑。 A single-ended undisturbed SRAM unit includes a plurality of SRAM units and a data read/write unit electrically connected with the SRAM units. Each SRAM unit comprises a transistor pair, a writing transistor, a transmission transistor, an antidisturbance transistor and a leakage current transistor. The transistor pair electrically connected to a storage node and an inverse storage node. The writing transistor electrically connected to the storage node, the anti-disturbance transistor electrically connected to the writing transistor and the transmission transistor, and the leakage current transistor electrically connected to the storage node and a ground. Wherein, the leakage current transistor is controlled by a potential of the inverse storage node for turning on/off the electrically connection between the storage node and the ground to provide a discharge path when the leakage current transistor is on.
本會(收文號1110071360)同意該校111年11月17日中產營字第1111401258號函申請終止維護專利(國立中山大學)
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