發明
中華民國
106119320
I 660307
二元碼轉譯裝置及方法
國立交通大學
2019/05/21
原先二元碼轉譯系統中,遇到間接跳躍時,需查閱位址對映表來得到相對應的目標位址,而造成大量的額外負擔,然而大多數的間接跳躍是來自於函式返回。在動態二元碼轉譯中,其來源暫存器是被模擬在記憶體中,真正從來源記憶體操作指令所轉譯過來的指令會使得對於模擬在記憶體中的來源暫存器的存取有優化上的困難 ,無法消除冗餘的記憶體存取。因此,我們提出了兩種優化方法,消除了因函式返回所造成的間接跳躍和對模擬在記憶體中的來源暫存器的冗餘記憶體存取。 In a traditional binary translation system, translating an indirect jump instruction needs to consult an address mapping table in order to decide the corresponding target address in the translated code. This takes a lot of time. The majority of the indirect jump instructions are generated (by a compiler) for returning from a function to its caller. In dynamic binary translators, the registers are emulated with the main memory. Instructions that operate on registers actually operate on the main memory in the translated code. This makes it difficult to eliminate redundant memory accesses during optimization. For this purpose, we propose two optimization methods to eliminate redundant memory accesses due to indirect jump instructions and emulated registers in the main memory.
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