具有雙晶銅線路層之電路板及其製作方法 CIRCUIT BOARD WITH TWINNED CU CIRCUIT LAYER AND METHOD FOR MANUFACTURING THE SAME

專利類型

發明

專利國別 (專利申請國家)

美國

專利申請案號

14/055,456

專利證號

US 8,836,121 B2

專利獲證名稱

具有雙晶銅線路層之電路板及其製作方法 CIRCUIT BOARD WITH TWINNED CU CIRCUIT LAYER AND METHOD FOR MANUFACTURING THE SAME

專利所屬機關 (申請機關)

國立交通大學

獲證日期

2014/09/16

技術說明

本發明係有關於一種具有雙晶銅線路層之電路板及其製作方法，其中電路板包括下列步驟：(A) 提供一基板，其一表面設有一第一線路層，且第一線路層係包括一電性連接墊；(B) 形成一第一介電層於基板之表面上；(C) 形成複數開口於第一介電層中，其中每一開口係貫穿第一介電層並對應於電性連接墊以顯露電性連接墊；(D) 於開口中形成一銅晶種層；(E) 以一電鍍法於開口中沉積一奈米雙晶銅層；以及(F) 退火處理基板以轉換銅晶種層成奈米雙晶銅，且奈米雙晶銅層及轉換後之銅晶種層係形成一第二線路層，而第二線路層包括複數形成於開口中之第一導電盲孔。 A circuit board with twinned Cu circuit layer and a method for manufacturing the same are disclosed. The method for the present invention comprises the following steps: (A) providing a substrate with a first circuit layer formed thereon, wherein the first circuit layer comprises a conductive pad; (B) forming a first dielectric layer on the surface of the substrate; (C) forming plural openings in the first dielectric layer, wherein each opening penetrates through the first dielectric layer and correspond to the conductive pad to expose the conductive pad; (D) forming a Cu seeding layer in the openings; (E) forming a nano-twinned Cu layer in the openings with an electroplating process; and (F) annealing the substrate to transfer the material of the Cu seeding layer into nano-twinned Cu, wherein the nano-twinned Cu layer and the transferred Cu seeding layer are formed into a second circuit layer, and the second circuit layer comprise plural first conductive vias formed in the openings.

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