互補式電阻式記憶體之製造方法

專利類型

發明

專利國別 (專利申請國家)

中華民國

專利申請案號

104133810

專利證號

I 610429

專利獲證名稱

互補式電阻式記憶體之製造方法

專利所屬機關 (申請機關)

國立臺灣科技大學

獲證日期

2018/01/01

技術說明

本新發明技術為一種互補式電阻式記憶體之製造方法，該方法包括在一基材表面沈積三層薄膜，該三層薄膜可以為MIM堆疊構造或是MMM堆疊構造(其中M代表導體材料而I代表絕緣體材料)，然後再進行熱處理製程。該三層膜層中至少包含一氧化物膜，其氧成份可以提供與相鄰膜層於熱處理時反應生成界面氧化物電阻膜。該熱處理製程將該三層膜層轉變成五層膜層。該五層膜層為MIMIM堆疊構造，並且可以視為兩個背向串聯之MIM結構電阻式記憶體，因此該五層膜層結構具有互補式電阻切換性質。 We develop a method of fabricating complementary resistive switching memory devices. First, a three-layer stack structure is prepared with an MIM or an MMM configuration, where the M is a conductor and the I is an insulator. Then the three-layer stack is annealed to promote interfacial reactions. There is at least one oxide layer in the three-layer stack. The oxygen in the oxide layer induces interaction with adjacent layers to generate additional interfacial oxide resistors during the annealing. Thus the three-layer stack converts to a five-layer stack that resembles two anti-serial connecting resistive switching devices each with an MIM stack structure. Therefore, thus formed five-layer stack becomes complementary resistive switching memory device.

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