基於記憶體內運算電路架構之量化方法及其系統

專利類型

發明

專利國別 (專利申請國家)

中華民國

專利申請案號

109109478

專利證號

I 737228

專利獲證名稱

基於記憶體內運算電路架構之量化方法及其系統

專利所屬機關 (申請機關)

國立清華大學

獲證日期

2021/08/21

技術說明

【中文】 一種感測器內處理單元及記憶體內運算單元之整合方法包含以下步驟，提供步驟驅動感測器內處理單元提供第一指令訊號及複數初始資料並傳輸至匯流排單元。轉換步驟驅動第一指令訊號及初始資料經過同步模組而轉換為第二指令訊號及複數輸入資料。擷取步驟驅動畫面差異模組接收輸入資料，以擷取成複數差異資料。分割步驟驅動位元分割模組接收差異資料，並將各差異資料分割成複數位元片。控制步驟驅動編碼模組接收差異位址，並將差異位址編碼成控制訊號，且記憶體內運算單元依據控制訊號存取各位元片。藉此，有利於降低運算的耗能與時間。 【英文】 A method for integrating processing-in-sensor and in-memory computing includes the following steps. A providing step is performed for driving the processing-in-sensor to provide a first command signal and a plurality of initial data and transmit them to the in-memory computing. A converting step is performed for driving the first command signal and the initial data to convert to a second command signal and a plurality of input data through a synchronization module. The capturing step is performed for driving a frame difference module to receive the input data to get a plurality of difference. The slicing step is performed for driving a bit-slicing module to receive the difference and slice each of the difference into a plurality of bit slices. The controlling step is performed for driving an encoding module to receive a differing address and encode the differing address into a control signal, and the in-memory computing accesses each of the bit slices according to the control signal. Therefore, it is favorable for reducing energy consumption and time of operation.

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