Sense amplifier of resistive memory and operating method thereof

專利類型

發明

專利國別 (專利申請國家)

美國

專利申請案號

15/939,262

專利證號

US 10,186,318 B1

專利獲證名稱

Sense amplifier of resistive memory and operating method thereof

專利所屬機關 (申請機關)

國立清華大學

獲證日期

2019/01/22

技術說明

A sense amplifier of a resistive memory is controlled by a bit line and a reference line. A voltage sense amplifier has a bit-line input node and a reference input node. A margin enhanced pre-amplifier includes a bit-line two-terminal switching element, a bit-line capacitor, a bit-line three-terminal switching element, a reference two-terminal switching element, a reference capacitor and a reference three-terminal switching element. A read voltage difference between the voltage level of the bit line and the reference line is generated. The bit-line two-terminal switching element, the bit-line three-terminal switching element, the reference two-terminal switching element and the reference three-terminal switching element are synchronizedly switched so as to generate a margin enhanced difference between the voltage level of the bit-line input node and the voltage level of the reference input node. The margin enhanced difference is equal to or greater than three times the read voltage difference.

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