發明
中華民國
099123917
I 475615
自我對準之頂閘極薄膜電晶體及其製法
國立交通大學
2015/03/01
一種自我對準薄膜電晶體之製造方法,首先提供具有相對的第一面與第二面之透明基板,並且依序沉積一氧化物閘極、介電層、及光阻層於透明基板的第一面上。接著,對基板的第二面照射紫外光,以對光阻層進行曝光,其中以氧化物閘極製成的氧化物閘極係做為光罩,並吸收照射至對應於氧化物閘極之光阻層的紫外光。接著移除曝光之光阻層,並沉積一透明導電層於未曝光之光阻層及介電層上。對透明導電層執行圖案化製程,以形成源極與汲極,並形成主動層覆蓋於源極、汲極、及介電層上,以完成一自我對準薄膜電晶體結構。 A method for manufacturing a self-aligned thin film transistor and a structure of the same are provided. The method includes following steps: providing a transparent base has a first surface and a second surface face to each other, and forming a gate oxide, a dielectric layer, and a photo-resist layer on the first surface of the transparent base serial. Irradiating an ultraviolet light to the second surface of the transparent base to perform an exposure process on the photo-resist layer. A gate formed by the gate oxide is used to be a mask and absorbs the ultraviolet light irradiates to a portion of the photo-resist layer corresponding to the gate oxide. Removing the photo-resist layer that is exposed, and depositing a transparent conductive layer on remain photo-resist layer and the dielectric layer. Performing a pattern process to form a source electrode and a drain electrode on the transparent conductive layer.
本部(收文號1100065219)同意該校110年10月27日陽明交大研產學字第1100036963號函申請終止維護專利(陽明交大)
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